Silicon (Si) element is a type of semiconductor material commonly used in electronic industries, and can be used as a substrate of a semiconductor wafer which thus can be deposited with various conductive material and dielectric material by semiconductor processes, wherein various deposited layers thereon are then patterned by suitable photomask exposure and development processes, so as to construct multi-layer patterned integrated circuit (IC) structures. After forming the IC structures, the semiconductor wafer can be cut into a plurality of chips for being used as active control elements of various electronic products.
For a dielectric layer of the semiconductor wafer, the most common dielectric material is silicon dioxide (silica, SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON) and etc. However, with the line-width miniaturization of IC processes (such as 0.13 μm processes), a dielectric layer of SiO2 with too smaller thickness will cause the phenomenon of electronic breakdown accompanied with very large static leakage power due to direct tunneling, wherein the direct tunneling leakage current seriously affects the power consumption of circuit elements which thus lose normal operation functions thereof (such as a memory storage function). Thus, when the thickness of a SiO2 dielectric layer of a gate is designed to be smaller than 10 nm, the manufacturer uses high-k material to replace traditional SiO2 material for solving the serious phenomenon of direct tunneling leakage current. Under the same thickness of SiO2, the high-k material can substantially provide a greater physical thickness to solving the technical problem of direct tunneling leakage current.
The common high-k material comprises Al2O3, HfO2, ZrO2, TiO2, La2O3, Pr2O3 or mixture thereof. The foregoing high-k material can be applied to gate dielectric layers in ICs. For example, the gate dielectric layers are important structural layers of metal oxide semiconductor field effect transistors (MOSFETs). Under the same thickness of SiO2, the quantum tunneling can be up to 1.5 to 2.5 nm. For increasing the speed of circuit elements and lowering the threshold voltage thereof, the thickness of the gate dielectric layers need to be continuously lowered. If the gate dielectric layers are thinner, the desire of the gate dielectric layers is stricter, i.e. it needs to use the foregoing high-k material to provide a lower leakage current or higher breakdown field.
Generally, the foregoing dielectric material or high-k material is processed by heating silicon substrate, chemical vapor deposition (CVD) or DC magnetron sputtering system to obtain an oxide layer of SiO2 or a high-k coating. However, syntheses and crystallo-chemistries of the foregoing perovskite type compounds are too complicated, while the stability of pure phase thereof, the precise control of composite and oxygen stoichiometry are also very difficult. Therefore, it needs to use amorphous high-k oxide candidates with superior phase stability for designing and assembling multifunctional devices that operate at higher temperatures. In addition, the superior electronic performance of Si in particular the Si surface that is realized with an SiO2 overlayer, the Si—SiO2 interface, has not been achieved with any other semiconductor-dielectric combination to this day. SiO2 effected a seemingly magical improvement in the electrical characteristics of the Si surface compatible with planarization technology. Future CMOS generations may be enhanced by nanocrystalline high-k dielectrics, and added functionality and flexibility may be achieved through oxide/silicon/oxide heterostructures for quantum-effect devices.
Recently, there has been a trend of development of magnetic nanoparticle in nonmagnetic dielectric matrix to tailor desired magnetic, dielectric, and other properties depending on the concentration of the magnetic ions. However, these types of perovskites possess compositional variations, structural inhomogeneities, or phase heterogeneities in physical scale from micron or submicron range to the atomic level. This suggests that the high-k value and MD behavior of aforementioned complex system is not a fundamental property but is rather an artifact associated with mesoscopic heterogeneities of the system. Therefore, searching for alternative materials containing single-valent ions with phase stability would be highly desirable.
As a result, it is necessary to provide a semiconductor wafer having dielectric layers showing colossal magnetodielectric effect and a manufacturing method thereof to solve the problems existing in the conventional technologies, as described above.
It is found by the present invention that magnetic rare earth oxides (RE2O3, RE means lanthanoids, i.e. a series of 10 elements from La to Lu in the periodic table) can be embedded into SiO2 glass matrix to form composite of super-paramagnetic nanoparticles showing colossal magnetodielectric (MD) effect, wherein the colossal MD behavior in this glassy system is related to the magnetic spin and the dipole coupling through the lattice, so as to be able to develop magnetoresistance change effects associated with nanoparticles size and concentration.